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	~~Unfortunately~~, ~~Narval's AMD processors~~ are ~~''incompatible''~~ with ~~the~~ [https://en.wikipedia.org/wiki/~~AVX-512 AVX512~~] ~~instruction set (from~~ https://en.wikipedia.org/wiki/~~Skylake Skylake onwards) on the [[Béluga/en#Node_characteristics\|Béluga~~]~~] and [[Niagara#Node_characteristics\|Niagara]] nodes~~, ~~as well as~~ the ~~more recent~~ nodes ~~on [[Cedar#Node_characteristics\|~~Cedar]] and ~~[[Graham#Node_characteristics\|~~Graham~~]]. Consequently~~, ~~applications compiled on those relatively recent Intel~~ nodes will ~~probably not function~~ on Narval ~~and recompiling~~ will ~~certainly~~ be ~~necessary~~ (see ''Intel compilers'' below).		AVX2 is supported on nodes which have Broadwell type CPUs, while both instruction sets (AVX2 and AVX512) are on nodes with CPUs of type [https://en.wikipedia.org/wiki/Skylake Skylake] or [https://en.wikipedia.org/wiki/Cascade_Lake_(microarchitecture Cascade Lake]. Consequently, an application compiled on the Broadwell nodes of Cedar and Graham, including their login nodes, will run on Narval, but it will not be executable if it is compiled on Béluga or Niagara or on a Skylake or Cascade Lake node of Cedar or Graham. Such an application must be recompiled (see ''Intel compilers'' below)