Translations:Narval/16/en: Difference between revisions

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=AMD processors=
=AMD processors=
== Supported instructions sets ==
== Supported instructions sets ==
Narval is equipped with 2nd and 3rd generation  AMD EPYC processors which support  [https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2 AVX2 instructions]. This instruction set is identical to the one used by INTEL processors on the [[Béluga/en#Caractéristiques_des_nœuds|Béluga]], [[Cedar#Node_characteristics|Cedar]], [[Graham#Node_characteristics|Graham]] and [[Niagara#Node_characteristics|Niagara]] nodes. The Narval AMD processors and the Intel processors of the [https://en.wikipedia.org/wiki/Haswell_(microarchitecture) Haswell] generation are both restricted to AVX2 and earlier instructions. As such, applications compiled on a [[Cedar#Node_characteristics|Cedar]] or [[Graham#Node_characteristics|Graham]] Broadwell node should function on Narval, otherwise you will need to recompile with the appropriate architecture parameters (see ''Intel compilers'' below).
Narval is equipped with 2nd and 3rd generation  AMD EPYC processors which support  [https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2 AVX2 instructions]. This instruction set is identical to the one used by INTEL processors on the [[Béluga/en#Node_characteristics|Béluga]], [[Cedar#Node_characteristics|Cedar]], [[Graham#Node_characteristics|Graham]] and [[Niagara#Node_characteristics|Niagara]] nodes. The Narval AMD processors and the Intel processors of the [https://en.wikipedia.org/wiki/Haswell_(microarchitecture) Haswell] generation are both restricted to AVX2 and earlier instructions. As such, applications compiled on a [[Cedar#Node_characteristics|Cedar]] or [[Graham#Node_characteristics|Graham]] Broadwell node should function on Narval, otherwise you will need to recompile with the appropriate architecture parameters (see ''Intel compilers'' below).

Revision as of 19:52, 18 October 2021

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Message definition (Narval)
==Particularités liées aux processeurs AMD==
===Ensemble d'instructions pris en charge===
La grappe Narval est équipée de processeurs AMD EPYC de 2e et 3e génération qui prennent en charge les instructions [https://fr.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2 AVX2]. Cet ensemble d'instructions est le même que celui des processeurs Intel que l'on retrouve sur les nœuds de [[Béluga#Caract.C3.A9ristiques_des_n.C5.93uds|Béluga]], [[Cedar/fr#Caract.C3.A9ristiques_des_n.C5.93uds|Cedar]], [[Graham/fr#Caract.C3.A9ristiques_des_n.C5.93uds|Graham]] et [[Niagara/fr#Caract.C3.A9ristiques_des_n.C5.93uds|Niagara]].<br>

AMD processors

Supported instructions sets

Narval is equipped with 2nd and 3rd generation AMD EPYC processors which support AVX2 instructions. This instruction set is identical to the one used by INTEL processors on the Béluga, Cedar, Graham and Niagara nodes. The Narval AMD processors and the Intel processors of the Haswell generation are both restricted to AVX2 and earlier instructions. As such, applications compiled on a Cedar or Graham Broadwell node should function on Narval, otherwise you will need to recompile with the appropriate architecture parameters (see Intel compilers below).

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