Translations:Narval/16/en: Difference between revisions

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=AMD processors=
==AMD processors==
== Supported instructions sets ==
=== Supported instructions sets ===
Narval is equipped with 2nd and 3rd generation AMD EPYC processors which support the [https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2 AVX2 instruction set]. This instruction set is also supported by all CPUs at [[Béluga/en#Node_characteristics|Béluga]], [[Cedar#Node_characteristics|Cedar]], [[Graham#Node_characteristics|Graham]] and [[Niagara#Node_characteristics|Niagara]].
Narval is equipped with 2nd and 3rd generation AMD EPYC processors which support the [https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2 AVX2 instruction set]. This instruction set is the same as that found on the Intel processors on the nodes at [[Béluga/en#Node_characteristics|Béluga]], [[Cedar#Node_characteristics|Cedar]], [[Graham#Node_characteristics|Graham]] and [[Niagara#Node_characteristics|Niagara]].
 
However, all nodes at Béluga and Niagara and ''some'' nodes at Cedar and Graham also support [https://en.wikipedia.org/wiki/AVX-512 AVX512] instructions, which are ''not'' supported at Narval.

Latest revision as of 13:32, 24 April 2024

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Message definition (Narval)
==Particularités liées aux processeurs AMD==
===Ensemble d'instructions pris en charge===
La grappe Narval est équipée de processeurs AMD EPYC de 2e et 3e génération qui prennent en charge les instructions [https://fr.wikipedia.org/wiki/Advanced_Vector_Extensions#Advanced_Vector_Extensions_2 AVX2]. Cet ensemble d'instructions est le même que celui des processeurs Intel que l'on retrouve sur les nœuds de [[Béluga#Caract.C3.A9ristiques_des_n.C5.93uds|Béluga]], [[Cedar/fr#Caract.C3.A9ristiques_des_n.C5.93uds|Cedar]], [[Graham/fr#Caract.C3.A9ristiques_des_n.C5.93uds|Graham]] et [[Niagara/fr#Caract.C3.A9ristiques_des_n.C5.93uds|Niagara]].<br>

AMD processors

Supported instructions sets

Narval is equipped with 2nd and 3rd generation AMD EPYC processors which support the AVX2 instruction set. This instruction set is the same as that found on the Intel processors on the nodes at Béluga, Cedar, Graham and Niagara.

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